@▷ 555 DC Voltage Doubler Circuit | Diagram for Schematic

555 DC Voltage Doubler Circuit

This dc voltage doubler circuit produces a voltage that is twice its voltage supply. This is useful when a higher voltage level is needed out of a single lower voltage power supply. Since the current consumption levels are low in such cases, the circuit can be built with minimal resources.

Voltage Doubler Circuit Schematic

555 voltage doubler circuit schematic

The electronic circuit is basically a square wave generator using the common LM555 timer IC. It is followed by a final stage made of transistors T1 and T2. The actual doubler circuit is made of D1, D2, C4 and C5 components.

The 555 dc voltage doubler timer IC works as an astable multivibrator and generates a frequency of about 8.5 kHz. The quare wave output drives the final stage made of T1 and T2. This is how the doubler works: by a low amplitude of the signal, transistor T1 blocks while T2 conducts. The minus electrode of the capacitor C4 is grounded and charges through D1. By a high amplitude of the signal, transistor T1 conducts while T2 blocks. However, capacitor C4 cannot discharge because it is blocked by D1. The following capacitor C5 is therefore charged with a combined voltage from C4 and the power supply (12V input).
On standby, the circuit delivers around 20 volts The maximum load must not exceed 70 mA. The actual output voltage is around 18 volts giving an efficiency rating of 32 %. On lower current ratings, the voltage is higher. If a stable voltage lever is desired, a 3 pin voltage regulator IC can be added at the output. The regulator IC’s own current consumption must be added to the total current consumption which must not exceed 70 mA.
For more voltage doublers check the related posts bellow.