@▷ Fast Peak Detector | Diagram for Schematic

Fast Peak Detector

Fast peak detector requires special amplifier features. The output stage must have high slew rate to keep up with the intermediate stages of the amplifier. This condition causes either a long overload or DC accuracy errors. The amplifier must deliver large currents into the capacitive load of the detector to maintain a high slew rate of at the output. Other problems that should be resolved includes preservation of output voltage accuracy and instability with large capacitive loads.

closed loop fast peak detector circuit schematic

With 50mA output current, 70° phase margin, and 450V/ms slew rate,  LT1190 is suitable for this application. A 20W resistor (RO) isolates the 10nF load and prevents oscillation.  Good accuracy is obtained using closed-loop peak detector circuit  that employs a Schottky diode inside the feedback loop.  The amplitude error of this circuit would be under 10% for the frequency up to 300 kHz of input signal, and under 20% for up to 3 MHz. [Schematic diagram source: Linear Technology Application Notes]

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