@▷ IC CA3140 Datasheet | Diagram for Schematic

IC CA3140 Datasheet

CA3140 is the 4.5MHz BiMOS Operational Amplifier with MOSFET inputs and Bipolar output. This Op Amp combines the advantage of PMOS transistors and high voltage bipolar transistors.

CA3140 has gate protected MOSFETs (PMOS) transistors in the input circuit to provide very high input impedance typically around 1.5T Ohms.

The IC requires very low input current as low as 10pA to change the output status, high or low. The IC has very fast response and high speed of performance. The output stage of the IC uses bipolar transistors and includes built in protection against damage from load terminal short circuiting to either supply rails or to ground.

The use of PMOS FET in the input stage results in common mode input voltage capabilities down to 0.5 volts below the negative supply terminals. These operational amplifiers are internally phase compensated to achieve stable operation in unity gain follower operation, and additionally, have access terminal for a supplementary external capacitor if additional frequency roll-off is desired. Terminals are also provided for use in applications requiring input offset voltage Nulling.

Pin connections

The CA3140 Series has the same 8-lead pin out

Pin1Offset Null
Pin2 Inverting input INV
Pin3 Non inverting input Non-INV
Pin4 Ground- Negative supply
Pin5 Offset Null
Pin6 Output
Pin7 Positive supply
Pin8 Strobe

Operating conditions

Supply voltage 36 volt maximum
Input terminal current 1mA

CA3140 Block Diagram

Nulling of Offset Voltage

The input offset voltage can be nulled by connecting a 10K pot between the terminals 1 and 5 and returning its wiper to the ground. This technique, however, gives more adjustment range than required and therefore, a considerable portion of the potentiometer rotation is not fully utilized.

Low Voltage Operation

Operation at total supply voltages as low as 4V is possible with the CA3140. A current regulator based upon the PMOS threshold voltage maintains reasonable constant operating current and hence consistent performance down to these
lower voltages.

Bandwidth and Slew Rate

For those cases where bandwidth reduction is desired, for example, broadband noise reduction, an external capacitor connected between Terminals 1 and 8 can reduce the open loop -3dB bandwidth. The slew rate will, however, also be proportionally reduced by using this additional capacitor. Thus, a 20% reduction in bandwidth by this technique will also reduce the slew rate by about 20%.

Input Circuit Considerations

The amplifier inputs can be driven below the terminal 4 potential, but a series current limiting resistor is recommended to limit the maximum input terminal current to less than 1mA to prevent damage to the input protection circuitry. Moreover, some current limiting resistance should be provided between the inverting input and the output when the CA3140 is used as a unity gain voltage follower. This resistance prevents the possibility of extremely large input signal transients from forcing a signal through the input protection network and directly driving the internal constant current source which could result in positive feedback via the output terminal. A 3.9 K resistor is sufficient.

The typical input current is on the order of 10pA when the inputs are centered at nominal device dissipation. As the output supplies load current, device dissipation will increase, raising the chip temperature and resulting in increased input Current.

It is well known that MOSFET devices can exhibit slight changes in characteristics due to the application of large differential input voltages that are sustained over long periods at elevated temperatures. Both applied voltage and temperature accelerate these changes. The process is reversible and offset voltage shifts of the opposite polarity reverse the offset.

Source: CA3140 Intersil Datasheet File No. 957.4