@▷ Long Time Delay using IC Timer 555 Circuit Diagram | Diagram for Schematic

Long Time Delay using IC Timer 555 Circuit Diagram

The timing in 555 IC Timer is a function of charging rate of the external capacitor. This schematic needs expensive capacitors with extremely low leakage. The components limit the time between pulse to around 20 minutes. We can connect both halves in tandem with a divide-by network in between to get longer time periods. Here is the schematic :

Long Time Delays with 555 Timer Circuit

The first timer section operated in an oscillatory mode. The first timer period is 1/Fo.Then the “divide-by-N” network recieves this signal and will generate the output signal with period of N/Fo. The second half of the 555 is triggered by the output signal of “divide-by-N”. So, the total time is now a function of Fo and N.

[Source: Philips Semiconductor Application Note]

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