@▷ Positive Trigger Timer Circuit | Diagram for Schematic

Positive Trigger Timer Circuit

This 555 Timer is designed unusually to give a positive output through a control over its reset pin. Usually the timer IC 555 is triggered by applying a negative going pulse to its trigger pin 2. This timer is triggered through a positive pulse in its reset pin.

In the Monostable mode IC 555 starts timing cycle when a negative pulse is applied to its trigger pin2. The timer starts oscillations only when its trigger pin goes to ground potential. The reset pin 4 is usually connected to positive rail to keep the timer ready to oscillate.

Here an alternate mode of operation is experimented. At power on, the voltage level in the capacitor C1 is less than 1/3 Vcc. This resets the internal Flip-Flop of IC and its output goes high and LED turns on.C1 then charges through R1. When the voltage level in C1 rises to 2/3 Vcc, output of IC turns low and LED turns off. This low output from pin 3 pulls the reset pin 4 to a low state and IC latches to off condition. The latching state continues even if the capacitor C1 discharges through the discharge pin 7 and voltage in C1 drops below 1/3 Vcc.

Positive Trigger Timer circuit

When a positive pulse is applied to reset pin4, IC triggers momentarily. Since the voltage in C1 is less than 1/3 Vcc, this positive trigger turns the output high and LED turns on. The timing cycle then starts depending on the values of R1 and C1 and LED remains on during the timing cycle. After completing the timing period (when voltage at C1 increases to 2/3 Vcc), output goes low and LED turns off indicating that time is over. During timing cycle, IC can be switched off by applying a negative pulse to its reset pin.