@▷ Precision Phase Locked Loop Circuit | Diagram for Schematic

Precision Phase Locked Loop Circuit

The precision Phase Locked Loop PLL in this circuit acts very much the same as the basic PLL, with refinements in various places. The flip-flops in the detector have a gate G1 to CLEAR them, for quicker response. The currents which A1 integrates are steered through Q1, Q2 and Q3, Q4 because transistors are quicker then diodes, yet have much lower leakage. The V-to-F converter uses A2 as an op-amp integrator, to get better than 0.01% nonlinearity (max). G2 is recommended as an inverter, to invert the signal on the LM331’s pin 3, avoid a delay, and improve loop stability. A4 is included as an  (optional) limiter, to prevent V1 from ever going positive. This will facilitate quick startup and recovery from overdrive conditions. show a picture schematic :

precision Phase Locked Loop Circuit Precision Phase Locked Loop Circuit

Source circuit : National Semicondutor Application

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